In AI back-end networks, switch radix shapes the architecture of the entire fabric.
Radix--the number of ports a switch supports--determines how many GPUs, switches, or other endpoints can connect through a single switching element.
Radix limits how large a fabric can grow before another switching tier is required. That matters because adding tiers requires more switches, more inter-switch links, more optics, more cabling, and more opportunities for congestion and latency variation.
Higher radix changes the architecture.
High-radix switches flatten the fabric, increasing the size of a single-tier domain and reducing the infrastructure sitting between GPUs. For example, a 10x increase in radix expands the maximum single-tier network from roughly 2,000 GPUs to 20,000 GPUs.
That translates into more predictable latency, simpler workload placement, fewer stranded resources, lower power and less cabling complexity.
But building a high radix switch is not as simple as taking an existing architecture and moving it to a smaller process node. Higher radix pushes I/O density, packaging, power delivery and cooling at the same time.
Solving those challenges requires the silicon and the system to be co-designed from the beginning. That's why at Eridu, we've developed a high-radix network switch with a clean-sheet design, purpose-built from silicon to system, for modern AI.
Learn more at eridu.ai.
#AINetworking #AIInfrastructure #DataCenterNetworking
Socratic Partners retweeted
GPU utilization in the 30–50% range. That's a lot of idle CapEx.
Christian Gallagher of Socratic on why a better interconnect for inference unlocks so much value at 100K+ GPU scale.
Watch ⬇️
Socratic Partners retweeted
Scale-up is headed past 72 devices to 1,000, then 10,000.
Our CEO @edoe on “In the Arena” from #OCPSummit26: why resiliency matters as much as bandwidth, and why rack scale is a stepping stone to multi-rack AI.
🎧 techarena.ai/content/delos-d…
Eridu is growing our ASIC engineering team in Silicon Valley and India! Join us if you're excited about the idea of working on silicon that's designed from a clean sheet for AI network switching, not just an iteration of existing technology.
We're hiring across the chip development cycle:
▶️ ASIC design
▶️ RTL engineering
▶️ DFT engineering
▶️ Verification
You'll work with a world-class team on high-radix switch technology that addresses critical bottlenecks in AI infrastructure, helping us take our ASIC innovation from architecture all the way to production silicon and systems.
See openings and apply online at ats.rippling.com/eridu-ai/jo…
If compute is being redesigned around AI, why is networking still based on the switch architectures and designs that were developed for cloud and SaaS? (Thread follows ⏬)
#AINetworking #AIInfrastructure
What would it take to break out of today's limits to the size of scale-up domains, reaching thousands of GPUs in a single-hop domain?
If you're headed to OCP Global Summit in two weeks, join Eridu CTO Promode Nedungadi and @delosdata CTO & Co-Founder Dan Daly as they discuss an open architecture for building multi-rack, single-hop domains of over 5000 GPUs.
They'll present an architecture that shrinks collective-communication time, tightens token-generation tail latency, and lets a frontier model fit entirely inside a single domain.
▶️ "Breaking up the Monolith - An Open Architecture for Multi-rack Scale-up Domain of 5000+ GPUs"
🕗 Wednesday, Oct 14 at 8:00am
📍 Room 220B (SJCC Concourse Level)
#OCPSummit26 #AIInfrastructure






