New report out: Full technology analysis of the Apple A20 Pro SoC. First A-series chip on TSMC N2 (GAA nanosheet) + new side-by-side WMCM packaging. We covered the complete teardown, package architecture, high-res die shots, annotated floorplan, and STEM of the GAA transistors. Details here: chipwise.tech/our-portfolio/… #A20Pro #TSMC #GAA #Semiconductors

chipwise.tech/our-portfolio/… Here you can find a higher mag of the NPU'S

Quite a lot 🔬

We might...

Let me zoom in a bit on those NPU's

There are probably plenty people out there who can benchmark such performances. We keep our focus on the Physical Analysis part 😊

Diving into the A20 Pro SoC from the iPhone 18 Pro. TSMC tape-out code: TMUR86 What should we prioritize in the analysis? 2nm GAA transistors, WMCM side-by-side packaging, the expanded Neural Engine, memory interface changes… or something else? Drop your focus areas below.

3.11 for workgroups

Free Technology Analysis Report – Broadcom BCM2712 (Raspberry Pi 5 SoC) We analysed the cost-optimized D0 stepping and compared it with the earlier C0/C1 version. Key findings: • ~41% die size reduction (55.3 → 32.4 mm²) • Annotated floorplan • FIB & STEM process analysis • Package analysis + cost estimates Full 28-page report available free of charge: chipwise.tech/our-portfolio/… #Semiconductor #ReverseEngineering #BCM2712 #RaspberryPi #Chipwise

Right part looks like I/O circuitry, Middle part looks like memory but not SRAM (different periphery). I would guess ROM. Left part I don't know. PLL?

The 4-cores are same size for both 2022&2023 > 13,2mm2. Process is TSMC 16nm FinFET

BCM2712 Die Size Comparison – C0/C1 vs D0 Stepping We analysed both steppings of Broadcom’s BCM2712 (the SoC powering the Raspberry Pi 5).

Here's the original...

Here's the original....

Also yup

Yes

Sure absolutely👌🏻

Yes but DE deserved more. I cannot say that about NL….sadly

It was a perfect goal. It’s a disgrace. Germany played to win. Paraguay was only frustrating the game. Sad for football