Reimagining Chip Design with AI.

San Francisco, CA
Joined May 2023
At @ChipStackAI, we collaborated closely with @OpenAI to use Reinforcement Fine-Tuning (RFT) to fine-tune o1-mini and o3-mini on a key chip design task: improving Verification IPs (VIPs) wiring for the given design. We saw a 12% improvement with just 36 samples! (1/n)
1
25
4
62
15,698